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Cadence and ARM Upgrade Quality of Silicon Results for ARM Partners With RTL
Compiler Synthesis
SAN JOSE, Calif. and CAMBRIDGE, England, February 16 /PRNewswire/ --
- Open Collaboration Delivers New Generation Digital Reference
Methodology
Key message points for analysts and journalists:
- ARM-Cadence Encounter Reference Methodology has been upgraded to
include the Cadence Encounter RTL Compiler
- Encounter RTL Compiler is the new Cadence synthesis technology,
integratedfrom Get2Chip
- Gives better quality of results than the previous ARM-Cadence Encounter
Reference Methodology
- New ARM-Cadence Encounter Reference Methodology now available in
limited release from ARM
Cadence Design Systems, Inc. (NYSE:CDN; Nasdaq:CDN) and ARM (LSE: ARM;
Nasdaq; ARMHY), the industry's leading provider of 16/32-bit embedded RISC
processor solutions, today announced the availability of the upgraded
ARM-Cadence Encounter(TM) Reference Methodology, which now incorporates
Encounter RTL Compiler synthesis. This completes yet another milestone in the
first year of the design chain collaboration between ARM and Cadence. The
latest collaboration further demonstrates their commitment to optimising the
silicon design chain by providing better quality of silicon (QoS) to Partners
using ARM(R) cores.
At 130nm and below, wires dominate the performance and present a host of
signal integrity problems to be solved in order to achieve first silicon
success. The upgraded ARM-Cadence Reference Methodology, based on the
Cadence(R) Encounter digital IC platform, provides an integrated,
wire-centric RTL-to-GDSII implementation for ARM Partners.
The Encounter platform integrates new generation technology for
wire-centric design with RTL Compiler for synthesis, First Encounter for
silicon virtual prototyping, NanoRoute(TM) for signal-integrity aware
routing, CeltIC(TM) and VoltageStorm(TM) for signal-integrity signoff. This
upgraded release of the Reference Methodology enables customers to achieve
improved QoS, the new metric of silicon quality, measured after wires for
accuracy.
"The ARM-Cadence Encounter Reference Methodology is now available in
limited release for some ARM9(TM) family cores. This release delivers
significant performance results over the current Cadence methodology as a
result of the addition of Encounter RTL Compiler," said John Goodenough,
global methodology manager, ARM. "This open collaboration demonstrates the
commitment of ARM and Cadence to increase the access to new-generation
nanometer solutions for our mutual customers."
The new-generation technology behind Encounter RTL Compiler delivers
global optimisation for timing closure using a patented set of global focus
algorithms that produce outstanding results at each stage of implementation
including a better starting point for routing complex, wire-centric designs.
Encounter RTL Compiler is used throughout the silicon design chain by
application-specific integrated circuit (ASIC) and intellectual property (IP)
vendors, and IC designers to help increase overall chip speed, and can help
to reduce turnaround time.
"The momentum of the ARM-Cadence alliance in the past year has given ARM
Partners an open choice of solutions and an open path to the future. Today,
using the upgraded Reference Methodology, our mutual customers will be able
to achieve outstanding quality of silicon in less time," said Jan Willis,
senior vice president of industry marketing, CadenceDesign Systems. "Our
collaboration with ARM will continue to focus on new-generation technology,
open standards and optimising the silicon design chain to deliver the
critical solutions needed for nanometer design."
Availability
The reference methodology supports the ARM926EJ-S(TM) core, the
ARM966E-S(TM) core, and the ARM946E-S(TM) core. The ARM-Cadence Encounter
Reference Methodology with RTL Compiler is available in limited release from
ARM. It is available at http://www.arm.com/products/CPUs/rfcadence.html
About ARM
ARM is the industry's leading provider of 16/32-bit embedded RISC
microprocessor solutions. The company licenses its high-performance,
low-cost, power-efficient RISC processors, peripherals, and system-chip
designs to leading international electronics companies. ARM also provides
comprehensive support required in developing a complete system. ARM's
microprocessor cores are rapidly becoming a volume RISC standard in such
markets as portable communications, hand-held computing, multi-media digital
consumer and embedded solutions. More information on ARM is available at
http://www.arm.com.
About Cadence
Cadence is the largest supplier of electronic design technologies,
methodology services,and design services. Cadence solutions are used to
accelerate and manage the design of semiconductors, computer systems,
networking and telecommunications equipment, consumer electronics, and a
variety of other electronics-based products. With approximately 4,800
employees and 2003 revenues of approximately $1.1 billion, Cadence has sales
offices, design centres, and research facilities around the world. The
company is headquartered in San Jose, Calif., and traded on the New York
Stock Exchange underthe symbol CDN. More information about the company, its
products and services is available at www.cadence.com.
Cadence, the Cadence logo and First Encounter are registered trademarks
of Cadence Design Systems. Encounter, NanoRoute, CeltIC and VoltageStorm are
trademarks of Cadence Design Systems, Inc. in the U.S. and other countries.
ARM is a registered trademark of ARM Limited. ARM9, ARM926EJ-S, ARM946E-S
and ARM966E-S are trademarks of ARM Limited. "ARM" is used to represent ARM
Holdings plc (LSE: ARM and Nasdaq: ARMHY); its operating company ARM Limited;
and the regional subsidiaries ARM INC; ARM KK; ARM Korea Ltd; ARM Taiwan; ARM
France SAS; ARM Consulting (Shanghai) Co. Ltd.; and ARM Belgium N.V.
DATASOURCE: ARM
For more information, please contact: Karin Gilles, The Hoffman Agency, for
Cadence Design Systems, +1 408-975-3038, kgilles@hoffman.com. ARM London Press
office: +44 (0)208 996 4141