Nassda Updates Product Line With New Version 6.0 Release

Nassda Updates Product Line With New Version 6.0 Release 


SANTA CLARA, Calif., March 28  /PRNewswire-FirstCall/ -- Nassda Corp.
(NASDAQ:NSDA), a leading provider of full-chip circuit simulation and analysis
software for the design of complex nanometer semiconductors, today announced
the planned release of version 6.0 of its HSIMplus(TM), HANEX(TM) and
CRITIC(TM) verification products in late April 2005.

In version 6.0, the hierarchical simulator in HSIMplus includes improvements
for DC convergence, transient analysis speed and modeling accuracy, to
specifically address the challenges in verification of designs with multiple
voltage domains implemented in 90nm and smaller processes, where power
management is a critical issue.

To extend the capabilities of HSIMplus for mixed-signal design verification,
integration with Mentor Graphics' ADVance MS(TM) (ADMS) single-kernel
mixed-language simulator is available in 6.0.  This optional integration adds
VHDL-AMS and Verilog-AMS co-simulation capability to HSIMplus, and adds
hierarchical capacity and speed to ADMS. The co-simulation option is also
extended to include the ModelSim(R) digital simulator. These integrations
support both top-down and bottom-up verification flows by allowing for either
the digital or circuit-level representation to be the top-level view for the
design. Verification engineers can also run Verilog testbenches directly with
HSIM without a separate digital simulation and translation step.

The HSIMplus platform for dynamic transistor-level analysis of nanometer
silicon effects is also enhanced in version 6.0 with the addition of the
Physical Visualization Manager (PVM).  The PVM generates GDSII layer maps to
graphically depict results from the power and signal net reliability analyses
performed by HSIMplus.  PVM provides an easy to use graphical interface for
analyzing the impact of IR drop in power grids, and diagnosing current density
problems in nanometer wiring that can lead to device failure from
electromigration. PVM is included with the HSIMplus power and signal net
reliability analysis options.

Nassda's HSIMplus 6.0 platform includes support for the Mentor Graphic's
Calibre(R) xRC extractor, to create the industry's first fully hierarchical
design flow for parasitic extraction and full-chip post-layout simulation of
nanometer circuit behavior.  This solution covers all types of hierarchical
custom design, including memory, analog/mixed-signal and SoC.  The combination
of HSIMplus 6.0 with the Calibre(R) xRC extractor provides improved capacity
and efficiency for verifying and analyzing nanometer designs and increasing
their performance and yield.

HANEX performs circuit-level timing and crosstalk analysis of leading-edge
custom digital designs in 130nm processes and below. In version 6.0,
enhancements include coverage of a wider range of design types, improved
analysis of manufacturing variations on circuit performance and increased speed
of analysis.  Silicon-on-Insulator (SOI) semiconductor devices are now
supported for low-leakage designs.  Pseudo-NMOS structures are also supported
for those custom digital designs that focus on maximizing speed and reducing
the size of the circuit layout.  Support for multiple process models allows
designers to perform worst-case timing analysis across all process corners to
verify correct behavior despite variations in IC manufacturing.  Improved
pattern matching and circuit partitioning algorithms enhance overall speed of
analysis for complex designs.

CRITIC performs post-layout timing analysis of clock and signal networks using
critical path information from digital static timers such as Synopsys PrimeTime
and Sequence ShowTime.  CRITIC version 6.0 supports a streamlined crosstalk
analysis flow and can utilize aggressor-only timing window data or can analyze
worst-case path delay if timing windows are not available.  For early analysis
of timing behavior, before layout is complete, idealized clock analysis with
balanced delay and slope is now available.  If a digital standard cell timing
model is not available, CRITIC version 6.0 can perform all of the
transistor-level simulation necessary to compute cell and interconnect delay
considering different input slopes and signal transitions. Digital static
timers can use this delay data to compute new critical paths and increase the
accuracy of timing closure in nanometer designs.

"Nassda provides leading-edge technology circuit verification solutions for
complex IC designs," stated An-Chang Deng, President of Nassda.  "We believe
our version 6.0 release further strengthens our technical leadership in
nanometer circuit simulation and analysis.  By continuing to enhance our
HSIMplus platform, full-chip post-layout simulation is practical for
verification of nanometer effects in complex designs.  HANEX's support for
multiple process corners and new design types such as SOI provides further
improvements in both speed and accuracy for post-layout analysis. Crosstalk
analysis with CRITIC is now even easier.  Nassda continues to strive to enhance
the capacity, performance and ease-of-use of its product line with each new
release in order to support our broad customer's requirements."

  Other Version 6.0 Enhancements

  New CircuitCheck(TM) Enhancements


The HSIMplus CircuitCheck option screens, identifies and reports potential
circuit problems using static and dynamic checks before and during simulation.
Developed in cooperation with customers working in the latest nanometer
processes, the new improvements in version 6.0 include checks for signal nets
subject to dynamic crosstalk noise, floating gate checks in power-down mode to
expose possible causes of excess leakage current, and enhanced leakage checks
for MOS devices.

New Device Modeling

To meet the demands for higher accuracy analysis in finer nanometer geometries
and at radio frequencies, Nassda has expanded the set of supported
semiconductor device models to include the SOI JFET model (MOS40).  For
analysis of long-term device reliability and aging effects, the MOS reliability
analysis option of version 6.0 HSIMplus supports user defined models for the
effects of hot carrier injection (HCI) and negative bias temperature
instability (NBTI) of MOS devices.  Analysis of these effects can help identify
areas of a design where the behavior could change after thousands of hours of
operation.

Pricing and Availability

The release 6.0 versions of HSIMplus, HANEX and CRITIC will be available in
April 2005, and will run on Sun Solaris, HP-UX, Microsoft Windows and Linux
platforms.  U.S. time-based list prices start at $67,500 for HSIMplus, $58,500
for HANEX and $54,000 for CRITIC.

About Nassda

Nassda Corporation is a leading provider of full-chip circuit verification
software for complex nanometer semiconductors. Headquartered in Santa Clara,
California, the company develops and markets simulation and analysis solutions
for advanced ICs, especially for analog, memory, high-performance digital, and
mixed-signal SoC designs. Nassda's products enable first silicon success and
improve IC quality and yield for its consumer, communication, computer and
memory customers. The company has sales and distribution offices throughout the
world. For more information about Nassda, please visit the company's website at
http://www.nassda.com/ .

Forward-Looking Statement

This press release contains forward-looking statements.  These statements
relate to the performance and achievements of the latest release of certain of
Nassda's software and Nassda's industry position in nanometer circuit
simulation and analysis, involve uncertainties and other factors that may cause
the actual results to differ materially from those expressed or implied by the
forward-looking statements.  In some cases, you will be able to identify
forward-looking statements by terminology such as "intend," "believe," "may,"
"will," "expect," "continue," "can" or the negative of these terms or other
comparable terminology.  Forward-looking statements are only predictions and
the actual events or results may differ materially, particularly with respect
to the continued acceptance of Nassda's existing software, the successful
introduction and widespread market acceptance of version 6.0 of Nassda's
products and the latent potential defects, design flaws and or other problems
with the latest versions of Nassda's products. Although Nassda believes that
the expectations reflected in the forward- looking statements are reasonable,
it cannot guarantee future levels of activity, performance or achievements.  In
addition, neither Nassda nor any other person assumes responsibility for the
accuracy and completeness of these forward-looking statements.  Nassda
disclaims any obligation to update information contained in any forward-looking
statement.

NOTE:  Nassda and HSIM are registered trademarks, and HSIMplus, HANEX and
CRITIC are trademarks of Nassda Corporation.  All other trademarks and
registered trademarks are the property of their respective owners. 

DATASOURCE: Nassda Corporation



CONTACT:  Graham Bell of Nassda Corporation, [phone], or

; or Ed Lee of Lee Public Relations, [phone], or

, for Nassda

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